Difference between revisions of "Papilio"
From Tech
Jump to navigationJump to searchLine 97: | Line 97: | ||
* 6-pin IC close to FTDI: 1TET |
* 6-pin IC close to FTDI: 1TET |
||
* 8-pin flash IC: ? |
* 8-pin flash IC: ? |
||
+ | |||
+ | =See Also= |
||
+ | * [[FPGA]] |
||
+ | * [[FPGA Test Board]] |
Revision as of 17:56, 18 April 2013
- Papilio Reference page
- Xilinx constraints.ucf file.
- Papilio Pinouts
- XC3S500E datasheet
Hello World VHDL (Blinking LED):
entity LEDtest is port ( clk: in bit; LED1: out bit; LED2: out bit ); end LEDtest; architecture BEHAVIOUR of LEDtest is signal count: integer range 0 to 16777215; signal tmp:bit:='0'; begin IN_process: process (clk) begin if clk'event and clk = '1' then count<=count+1; if count=16777215 then count<=0; tmp<=not tmp; LED1<=tmp; LED2<=not tmp; end if; end if; end process; end BEHAVIOUR;
With the following constraints file:
# Crystal Clock - use 32MHz onboard oscillator NET "clk" LOC = "P89" | IOSTANDARD = LVCMOS25 | PERIOD = 31.25ns ; # Wing1 Column A NET "LED1" LOC = "P91"; NET "LED2" LOC = "P92";
Use xc3prog to send to FPGA:
#just once (erased on reboot): sudo ./xc3sprog -c papilio ~/VHDL/LEDTest/LEDtest.bit -v #or use FTDI & FLASH to make non-volatile: sudo ./xc3sprog -c papilio -I../bscan_spi/bscan_spi_xc3s500e_papilio.bit ~/VHDL/LEDTest/LEDtest.bit -v -R
To compile xc3prog:
sudo aptitude install libftdi-dev libusb-1.0-0-dev git clone git://github.com/GadgetFactory/Papilio-Loader.git cd Papilio-Loader/xc3sprog/trunk mkdir build cd build cmake .. make sudo ./xc3sprog -c papilio ~/VHDL/AWGprovo/mem2.bit -v
dmesg on inserting:
[48531.284590] usb 1-1.4: new full-speed USB device number 4 using ehci-pci [48531.379349] usb 1-1.4: New USB device found, idVendor=0403, idProduct=6010 [48531.379359] usb 1-1.4: New USB device strings: Mfr=1, Product=2, SerialNumber=0 [48531.379365] usb 1-1.4: Product: Dual RS232 [48531.379369] usb 1-1.4: Manufacturer: FTDI [48531.450715] usbcore: registered new interface driver usbserial [48531.450731] usbcore: registered new interface driver usbserial_generic [48531.450741] usbserial: USB Serial support registered for generic [48531.475289] usbcore: registered new interface driver ftdi_sio [48531.475397] usbserial: USB Serial support registered for FTDI USB Serial Device [48531.475516] ftdi_sio 1-1.4:1.0: FTDI USB Serial Device converter detected [48531.475578] usb 1-1.4: Detected FT2232C [48531.475581] usb 1-1.4: Number of endpoints 2 [48531.475583] usb 1-1.4: Endpoint 1 MaxPacketSize 64 [48531.475585] usb 1-1.4: Endpoint 2 MaxPacketSize 64 [48531.475587] usb 1-1.4: Setting MaxPacketSize 64 [48531.477586] usb 1-1.4: FTDI USB Serial Device converter now attached to ttyUSB0 [48531.477611] ftdi_sio 1-1.4:1.1: FTDI USB Serial Device converter detected [48531.477670] usb 1-1.4: Detected FT2232C [48531.477672] usb 1-1.4: Number of endpoints 2 [48531.477675] usb 1-1.4: Endpoint 1 MaxPacketSize 64 [48531.477677] usb 1-1.4: Endpoint 2 MaxPacketSize 64 [48531.477679] usb 1-1.4: Setting MaxPacketSize 64 [48531.478467] usb 1-1.4: FTDI USB Serial Device converter now attached to ttyUSB1
About the clocks
Components
- FPGA markings: Xilinx \n Spartan \n XC3S500E ^TM \n VQ0100DGQ1213 \n D3236398A \n 4C
- 32MHz clock markings: CETECJ \n 32.000 \n @ <T> 116
- USB<->RS232 converter markings: FTDI \n FT2232D \n 207 -1
- FTDI crystal markings: <T> 6.0000
- Power Converter: AMS 1117 \n 1.2 HT1206
- Power Converter: AMS 1117 \n 2.5 HT 1218
- Power Converter: AMS 1117 \n 3.3 HT 226E
- Power Converter: AMS 1117 \n 5.0 HT ????
- 6-pin IC close to FTDI: 1TET
- 8-pin flash IC: ?