Difference between revisions of "FPGA Test Board"

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* send to beta-layout (or eurocircuits)
 
* send to beta-layout (or eurocircuits)
 
* generate components lists.
 
* generate components lists.
  +
==VHDL==
  +
* Make simulatable VHDL code...
   
 
=Components=
 
=Components=

Revision as of 19:09, 22 December 2013

TODO

PCB 'ClkTrig'

  • Check layout 25MHz crystal (same as 32MHz papilio?)
  • Check?
  • send to beta-layout (or eurocircuits)
  • generate components lists.

VHDL

  • Make simulatable VHDL code...

Components



Xilinx PCB design guides

Other stuff

Todo/tocheck

  • make papilio output +/- 71MHz differential signal, at several differential voltages.
  • add footprints to eagle
  • can spartan-differential easily be made compatible with rs484?

See Also