Difference between revisions of "Papilio"
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* Papilio [http://papilio.cc/index.php?n=Papilio.Reference Reference page] |
* Papilio [http://papilio.cc/index.php?n=Papilio.Reference Reference page] |
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* Xilinx [http://gadgetforge.gadgetfactory.net/gf/download/frsrelease/134/412/BPC3003_2.03%2B.ucf constraints.ucf] file. |
* Xilinx [http://gadgetforge.gadgetfactory.net/gf/download/frsrelease/134/412/BPC3003_2.03%2B.ucf constraints.ucf] file. |
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+ | * Papilio [http://papilio.cc/index.php?n=Playground.PapilioPinouts Pinouts] |
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+ | |||
+ | Hello World VHDL (Blinking LED): |
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+ | <nowiki>entity LEDtest is |
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+ | port ( |
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+ | clk: in bit; |
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+ | LED1: out bit; |
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+ | LED2: out bit |
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+ | ); |
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+ | end LEDtest; |
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+ | |||
+ | architecture BEHAVIOUR of LEDtest is |
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+ | signal count: integer range 0 to 16777215; |
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+ | signal tmp:bit:='0'; |
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+ | --signal LED1: bit:='0'; |
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+ | --signal LED2: bit:='1'; |
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+ | begin |
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+ | IN_process: process (clk) |
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+ | begin |
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+ | if clk'event and clk = '1' then |
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+ | count<=count+1; |
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+ | if count=16777215 then |
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+ | count<=0; |
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+ | tmp<=not tmp; |
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+ | LED1<=tmp; |
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+ | LED2<=not tmp; |
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+ | end if; |
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+ | end if; |
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+ | end process; |
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+ | end BEHAVIOUR;</nowiki> |
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+ | With the following constraints file: |
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+ | <nowiki># Crystal Clock - use 32MHz onboard oscillator |
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+ | NET "clk" LOC = "P89" | IOSTANDARD = LVCMOS25 | PERIOD = 31.25ns ; |
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+ | |||
+ | # Wing1 Column A |
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+ | NET "LED1" LOC = "P91"; |
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+ | NET "LED2" LOC = "P92";</nowiki> |
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To compile xs3prog: |
To compile xs3prog: |
Revision as of 23:46, 17 April 2013
- Papilio Reference page
- Xilinx constraints.ucf file.
- Papilio Pinouts
Hello World VHDL (Blinking LED):
entity LEDtest is port ( clk: in bit; LED1: out bit; LED2: out bit ); end LEDtest; architecture BEHAVIOUR of LEDtest is signal count: integer range 0 to 16777215; signal tmp:bit:='0'; --signal LED1: bit:='0'; --signal LED2: bit:='1'; begin IN_process: process (clk) begin if clk'event and clk = '1' then count<=count+1; if count=16777215 then count<=0; tmp<=not tmp; LED1<=tmp; LED2<=not tmp; end if; end if; end process; end BEHAVIOUR;
With the following constraints file:
# Crystal Clock - use 32MHz onboard oscillator NET "clk" LOC = "P89" | IOSTANDARD = LVCMOS25 | PERIOD = 31.25ns ; # Wing1 Column A NET "LED1" LOC = "P91"; NET "LED2" LOC = "P92";
To compile xs3prog:
sudo aptitude install libftdi-dev libusb-1.0-0-dev git clone git://github.com/GadgetFactory/Papilio-Loader.git cd Papilio-Loader/xc3sprog/trunk mkdir build cd build cmake .. make sudo ./xc3sprog -c papilio ~/VHDL/AWGprovo/mem2.bit -v
dmesg on inserting:
[48531.284590] usb 1-1.4: new full-speed USB device number 4 using ehci-pci [48531.379349] usb 1-1.4: New USB device found, idVendor=0403, idProduct=6010 [48531.379359] usb 1-1.4: New USB device strings: Mfr=1, Product=2, SerialNumber=0 [48531.379365] usb 1-1.4: Product: Dual RS232 [48531.379369] usb 1-1.4: Manufacturer: FTDI [48531.450715] usbcore: registered new interface driver usbserial [48531.450731] usbcore: registered new interface driver usbserial_generic [48531.450741] usbserial: USB Serial support registered for generic [48531.475289] usbcore: registered new interface driver ftdi_sio [48531.475397] usbserial: USB Serial support registered for FTDI USB Serial Device [48531.475516] ftdi_sio 1-1.4:1.0: FTDI USB Serial Device converter detected [48531.475578] usb 1-1.4: Detected FT2232C [48531.475581] usb 1-1.4: Number of endpoints 2 [48531.475583] usb 1-1.4: Endpoint 1 MaxPacketSize 64 [48531.475585] usb 1-1.4: Endpoint 2 MaxPacketSize 64 [48531.475587] usb 1-1.4: Setting MaxPacketSize 64 [48531.477586] usb 1-1.4: FTDI USB Serial Device converter now attached to ttyUSB0 [48531.477611] ftdi_sio 1-1.4:1.1: FTDI USB Serial Device converter detected [48531.477670] usb 1-1.4: Detected FT2232C [48531.477672] usb 1-1.4: Number of endpoints 2 [48531.477675] usb 1-1.4: Endpoint 1 MaxPacketSize 64 [48531.477677] usb 1-1.4: Endpoint 2 MaxPacketSize 64 [48531.477679] usb 1-1.4: Setting MaxPacketSize 64 [48531.478467] usb 1-1.4: FTDI USB Serial Device converter now attached to ttyUSB1