Difference between revisions of "FPGA Test Board"

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* add header pins to FLASH SPI, to allow direct programming by raspberry (to work around possible problems in FTDI connections)
 
* add header pins to FLASH SPI, to allow direct programming by raspberry (to work around possible problems in FTDI connections)
 
* add location for oven-controlled crystal
 
* add location for oven-controlled crystal
* add LED's (many)
 
 
* Check layout 25MHz crystal (same as 32MHz papilio?)
 
* Check layout 25MHz crystal (same as 32MHz papilio?)
 
* Power connector?
 
* Power connector?

Revision as of 18:05, 13 December 2013

TODO

layout

  • make all resistors on papilio 402, check capacitors
  • add header pins to FLASH SPI, to allow direct programming by raspberry (to work around possible problems in FTDI connections)
  • add location for oven-controlled crystal
  • Check layout 25MHz crystal (same as 32MHz papilio?)
  • Power connector?

questions

  • polarity of CCR on Display Port cable? (wiki has pin 7 as +lane_2, wim pin 7 as -CCR) -- Oh, that's because the sink-side has the pinning reversed -- but then the polarity of MR is wrong

Components



Xilinx PCB design guides

Other stuff

Todo/tocheck

  • make papilio output +/- 71MHz differential signal, at several differential voltages.
  • add footprints to eagle
  • can spartan-differential easily be made compatible with rs484?

See Also