LVDS

From Tech
Revision as of 21:13, 27 January 2014 by Joosteto (talk | contribs) (Created page with "=Documents= * [http://www.xilinx.com/support/documentation/application_notes/xapp230.pdf Xilinx: The LVDS I/O Standard] =Driving Xilinx LVDS inputs with CLC001= As the common...")
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to navigationJump to search

Documents

Driving Xilinx LVDS inputs with CLC001

As the common mode voltage can range from 0.25 to 2.25V, R_Ref can be 3.3kOhm or bigger, significantly reducing power usage.